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M Features * * * * * * * Available in SC-70-5 and SOT-23-5 packages 1 MHz Gain Bandwidth Product (typ.) Rail-to-Rail Input/Output Supply Voltage: 1.8V to 5.5V Supply Current: IQ = 100 A (typ.) 90 Phase Margin (typ.) Temperature Range: - Industrial: -40C to +85C - Extended: -40C to +125C * Available in Single, Dual and Quad Packages MCP6001/2/4 Description The Microchip Technology Inc. MCP6001/2/4 family of operational amplifiers (op amps) is specifically designed for general-purpose applications. This family has a 1 MHz gain bandwidth product and 90 phase margin (typ.). It also maintains 45 phase margin (typ.) with 500 pF capacitive load. This family operates from a single supply voltage as low as 1.8V, while drawing 100 A (typ.) quiescent current. Additionally, the MCP6001/2/4 supports rail-to-rail input and output swing, with a common mode input voltage range of VDD + 300 mV to V SS - 300 mV. This family of operational amplifiers is designed with Microchip's advanced CMOS process. The MCP6001/2/4 family is available in the industrial and extended temperature ranges. It also has a power supply range of 1.8V to 5.5V. 1 MHz Bandwidth Low Power Op Amp Applications * * * * * * Automotive Portable Equipment Photodiode Pre-amps Analog Filters Notebooks and PDAs Battery-Powered Systems Package Types MCP6001 SC-70-5, SOT-23-5 VOUT 1 VSS 2 VIN+ 3 + + MCP6002 PDIP, SOIC, MSOP VOUTA 1 VINA- 2 4 VIN- VINA+ 3 VSS 4 A -+ B +8 VDD 7 VOUTB 6 VINB- 5 VINB+ 5 VDD Available Tools Spice Macro Models (at www.microchip.com) FilterLab(R) Software (at www.microchip.com) Typical Application VDD VIN + MCP6001 VSS R1 R1 Gain = 1 + ----R2 VOUT MCP6001R SOT-23-5 VOUT 1 VDD 2 VIN+ 3 + + - 5 VSS MCP6004 PDIP, SOIC, TSSOP VOUTA 1 VINA- 2 14 VOUTD A +D - 13 VIND- -+ 12 VIND+ 11 VSS 10 VINC+ -+ +B C 9 VINC- 8 VOUTC 4 VIN- MCP6001U SOT-23-5 VIN+ 1 VSS 2 VIN- 3 5 VDD VINA+ 3 VDD 4 VINB+ 5 VINB- 6 R2 VREF 4 VOUT VOUTB 7 Non-Inverting Amplifier 2003 Microchip Technology Inc. DS21733D-page 1 MCP6001/2/4 1.0 ELECTRICAL CHARACTERISTICS PIN FUNCTION TABLE Name Function Absolute Maximum Ratings VDD - VSS .........................................................................7.0V All Inputs and Outputs ...................... VSS -0.3V to V DD +0.3V Difference Input Voltage ....................................... |VDD - VSS| Output Short Circuit Current ..................................continuous Current at Input Pins ....................................................2 mA Current at Output and Supply Pins ............................30 mA Storage Temperature ....................................-65C to +150C Maximum Junction Temperature (TJ) .......................... +150C ESD Protection On All Pins (HBM;MM) ............... 4 kV; 200V Notice: Stresses above those listed under "Maximum Ratings" may cause permanent damage to the device. This is a stress rating only and functional operation of the device at those or any other conditions above those indicated in the operational listings of this specification is not implied. Exposure to maximum rating conditions for extended periods may affect device reliability. VIN+, V INA+, VINB+, VINC+, VIND+ VIN-, V INA-, VINB-, V INC-, VIND- VDD VSS VOUT, VOUTA, V OUTB, VOUTC, V OUTD Non-inverting Inputs Inverting Inputs Positive Power Supply Negative Power Supply Outputs DC ELECTRICAL SPECIFICATIONS Electrical Characteristics: Unless otherwise indicated, TA = +25C, VDD = +1.8V to +5.5V, VSS = GND, VCM = VDD /2, RL = 10 k to VDD /2, and VOUT ~ VDD/2. Parameters Input Offset Input Offset Voltage Input Offset Drift with Temperature Power Supply Rejection Input Bias Current and Impedance Input Bias Current: Industrial Temperature Extended Temperature Input Offset Current Common Mode Input Impedance Differential Input Impedance Common Mode Common Mode Input Range Common Mode Rejection Ratio Open-Loop Gain DC Open-Loop Gain (large signal) Output Maximum Output Voltage Swing Output Short-Circuit Current Power Supply Supply Voltage Quiescent Current per Amplifier Sym VOS VOS/TA PSRR IB IB IB IOS ZCM ZDIFF V CMR CMRR AOL Min -7.0 -- -- -- -- -- -- -- -- VSS - 0.3 60 88 Typ -- 2.0 86 1.0 19 1100 1.0 1013||6 1013||3 -- 76 112 Max +7.0 -- -- -- -- -- -- -- -- VDD + 0.3 -- -- Units mV V/C dB pA pA pA pA ||pF ||pF V dB dB Conditions VCM = VSS TA= -40C to +125C, VCM = VSS VCM = VSS TA = +85C TA = +125C VCM = -0.3V to 5.3V, VDD = 5V VOUT = 0.3V to VDD - 0.3V, VCM = VSS VDD = 5.5V VDD = 1.8V VDD = 5.5V VOL, VOH ISC VSS + 25 -- -- -- 6 23 -- 100 V DD - 25 -- -- 5.5 170 mV mA mA V A VDD IQ 1.8 50 IO = 0, VDD = 5.5V, VCM = 5V DS21733D-page 2 2003 Microchip Technology Inc. MCP6001/2/4 AC ELECTRICAL SPECIFICATIONS Electrical Characteristics: Unless otherwise indicated, TA = +25C, VDD = +1.8 to 5.5V, VSS = GND, VCM = VDD/2, VOUT VDD/2, RL = 10 k to VDD/2, and CL = 60 pF. Parameters AC Response Gain Bandwidth Product Phase Margin Slew Rate Noise Input Noise Voltage Input Noise Voltage Density Input Noise Current Density Eni eni ini -- -- -- 6.1 28 0.6 -- -- -- Vp-p nV/Hz fA/Hz f = 0.1 Hz to 10 Hz f = 1 kHz f = 1 kHz GBWP PM SR -- -- -- 1.0 90 0.6 -- -- -- MHz V/s G = +1 Sym Min Typ Max Units Conditions TEMPERATURE SPECIFICATIONS Electrical Characteristics: Unless otherwise indicated, VDD = +1.8V to +5.5V, and VSS = GND. Parameters Temperature Ranges Industrial Temperature Range Extended Temperature Range Operating Temperature Range Storage Temperature Range Thermal Package Resistances Thermal Resistance, 5L-SC70 Thermal Resistance, 5L-SOT-23 Thermal Resistance, 8L-PDIP Thermal Resistance, 8L-SOIC (150 mil) Thermal Resistance, 8L-SOIC (208 mil) Thermal Resistance, 8L-MSOP Thermal Resistance, 14L-PDIP Thermal Resistance, 14L-SOIC Thermal Resistance, 14L-TSSOP Note: JA JA JA JA JA JA JA JA JA -- -- -- -- -- -- -- -- -- 331 256 85 163 118 206 70 120 100 -- -- -- -- -- -- -- -- -- C/W C/W C/W C/W C/W C/W C/W C/W C/W TA TA TA TA -40 -40 -40 -65 -- -- -- -- +85 +125 +125 +150 C C C C (Note) Sym Min Typ Max Units Conditions The industrial temperature devices operate over this extended temperature range, but with reduced performance. In any case, the internal Junction Temperature (TJ) must not exceed the Absolute Maximum specification of +150C. 2003 Microchip Technology Inc. DS21733D-page 3 MCP6001/2/4 2.0 Note: TYPICAL PERFORMANCE CURVES The graphs and tables provided following this note are a statistical summary based on a limited number of samples and are provided for informational purposes only. The performance characteristics listed herein are not tested or guaranteed. In some graphs or tables, the data presented may be outside the specified operating range (e.g., outside specified power supply range) and therefore outside the warranted range. Note: Unless otherwise indicated, TA = +25C, VDD = +1.8V to +5.5V, VSS = GND, VCM = VDD/2, VOUT VDD/2, RL = 10 k to VDD/2, and CL = 60 pF. 22% 100 Percentage of Occurrences 20% 18% 16% 14% 12% 10% 8% 6% 4% 2% 0% 1225 Samples VCM = VSS PSRR, CMRR (dB) 90 PSRR (VCM = VSS) 80 CMRR (VCM = -0.3V to +5.3V) 0 1 2 3 4 5 6 -7 -6 -5 -4 -3 -2 -1 7 70 -50 -25 0 25 50 75 100 125 Input Offset Voltage (mV) Ambient Temperature (C) FIGURE 2-1: Histogram. 100 90 Input Offset Voltage FIGURE 2-4: Temperature. 120 100 CMRR, PSRR vs. Ambient VCM = VSS 0 -30 -60 Phase -90 -120 Gain VCM = VSS 1.E-01 1.E+00 1.E+01 1.E+02 1.E+03 1.E+04 1.E+05 1.E+06 1.E+07 Open Loop Gain (dB) 80 70 60 50 40 30 20 1.E+01 1.E+02 PSRRPSRR+ 80 60 40 20 0 CMRR -150 -180 -210 10M 1.E+03 1.E+04 1.E+05 10 100 1k 10k 100k -20 0.1 1 10 100 1k 10k 100k 1M Frequency (Hz) Frequency (Hz) FIGURE 2-2: Frequency. 14% PSRR, CMRR vs. FIGURE 2-5: Frequency. 55% 50% 45% 40% 35% 30% 25% 20% 15% 10% 5% 0% 0 100 200 300 400 Open-Loop Gain, Phase vs. Percentage of Occurrences 12% 10% 8% 6% 4% 2% 0% Percentage of Occurrences 1230 Samples V DD = 5.5 V V CM = VDD TA = +85C 605 Samples V DD = 5.5 V V CM = VDD TA = +125C 500 600 700 800 900 1000 1100 1200 1300 1400 Input Bias Current (pA) Input Bias Current (pA) FIGURE 2-3: Histogram. Input Bias Current at +85C FIGURE 2-6: Histogram. Input Bias Current at +125C DS21733D-page 4 2003 Microchip Technology Inc. 1500 10 12 14 16 18 20 22 24 26 28 30 0 2 4 6 8 Open Loop Phase () PSRR, CMRR (dB) MCP6001/2/4 Note: Unless otherwise indicated, TA = +25C, VDD = +1.8V to +5.5V, VSS = GND, VCM = VDD/2, VOUT VDD/2, RL = 10 k to VDD/2, and CL = 60 pF. 1,000 18% Input Noise Voltage Density (nV/ Hz) Percentage of Occurrences 16% 14% 12% 10% 8% 6% 4% 2% 0% 1225 Samples VCM = VSS TA = -40C to +125C 100 Eni = 6.1 VP-P, 10 0.1 1.E-01 1.E+00 f = 0.1 to 10 Hz 10 1.E+01 0 2 4 6 -8 -6 -4 -2 8 10 5.0 -12 1 100 1.E+02 1k 1.E+03 10k 1.E+04 100k 1.E+05 Frequency (Hz) -10 Input Offset Voltage Drift (V/C) FIGURE 2-7: vs. Frequency. 0 Input Noise Voltage Density FIGURE 2-10: Histogram. 200 Input Offset Voltage Drift Input Offset Voltage (V) Input Offset Voltage (V) -100 -200 -300 -400 -500 -600 -700 VDD = 1.8V 150 100 50 0 -50 -100 -150 -200 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.5 V CM = VSS VDD = 1.8V VDD = 5.5V TA = -40C TA = +25C TA = +85C TA = +125C 0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 -0.4 -0.2 Common Mode Input Voltage (V) 2.2 Output Voltage (V) FIGURE 2-8: Input Offset Voltage vs. Common Mode Input Voltage at VDD = 1.8V. 0 VDD = 5.5V FIGURE 2-11: Output Voltage. 35 30 25 20 15 10 5 0 -50 -25 0 -ISC, VDD = 1.8V +ISC, VDD = 1.8V Input Offset Voltage vs. -100 -200 -300 -400 -500 -600 TA = -40C TA = +25C TA = +85C TA = +125C Output Short Circuit Current (mA) Input Offset Voltage (V) +ISC, V DD = 5.5V -ISC, V DD = 5.5V -700 -0.5 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 25 50 75 100 125 Common Mode Input Voltage (V) Ambient Temperature (C) FIGURE 2-9: Input Offset Voltage vs. Common Mode Input Voltage at VDD = 5.5V. FIGURE 2-12: Output Short-Circuit Current vs. Ambient Temperature. 2003 Microchip Technology Inc. DS21733D-page 5 12 MCP6001/2/4 Note: Unless otherwise indicated, TA = +25C, VDD = +1.8V to +5.5V, VSS = GND, VCM = VDD/2, VOUT VDD/2, RL = 10 k to VDD/2, and CL = 60 pF. 1.0 0.08 Output Voltage (20 mV/div) 0.9 Slew Rate (V/s) 0.8 0.7 0.6 0.5 0.4 0.3 0.2 0.1 0.0 Falling Edge, VDD = 5.5V Falling Edge, VDD = 1.8V G = +1 V/V 0.06 0.04 0.02 Rising Edge, VDD = 5.5V Rising Edge, VDD = 1.8V 0.00 -0. 02 -0. 04 -0. 06 -50 -25 0 25 50 75 100 125 -0. 08 0.E+00 1.E-06 2.E-06 3.E-06 Ambient Temperature (C) Time (1 s/div) 4.E-06 5.E-06 6.E-06 7.E-06 8.E-06 9.E-06 1.E-05 FIGURE 2-13: Temperature. Output Voltage Headroom (mV) 1,000 Slew Rate vs. Ambient FIGURE 2-16: Pulse Response. 5.0 4.5 Small Signal Non-Inverting G = +1 V/V V DD = 5.0V 100 VDD - V OH VOL - VSS Output Voltage (V) 1.E-02 4.0 3.5 3.0 2.5 2.0 1.5 1.0 10 1 10 1.E-05 1.E-04 1.E-03 0.5 0.0 0.E+00 1.E-05 2.E-05 3.E-05 4.E-05 5.E-05 6.E-05 7.E-05 8.E-05 9.E-05 1.E-04 100 1m 10m Output Current Magnitude (A) Time (10 s/div) FIGURE 2-14: Output Voltage Headroom vs. Output Current Magnitude. 10 FIGURE 2-17: Pulse Response. 160 140 Large Signal Non-Inverting Output Voltage Swing (VP-P) TA = +125C TA = 85C TA = 25C TA = -40C Quiescent Current per amplifier (mA) VDD = 5.5V 120 100 80 60 40 20 1 VDD = 1.8V VCM = VDD - 0.5V 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 0.1 1.E+03 1.E+04 1.E+05 1.E+06 0 1k 10k 100k 1M Frequency (Hz) Power Supply Voltage (V) FIGURE 2-15: Frequency. Output Voltage Swing vs. FIGURE 2-18: Quiescent Current vs. Power Supply Voltage. DS21733D-page 6 2003 Microchip Technology Inc. MCP6001/2/4 3.0 APPLICATION INFORMATION - RIN VIN MCP600X + VOUT The MCP6001/2/4 family of op amps is manufactured using Microchip's state-of-the-art CMOS process and is specifically designed for low cost, low power and general-purpose applications. The low supply voltage, low quiescent current and wide bandwidth makes the MCP6001/2/4 ideal for battery-powered applications. This device has high phase margin, which makes it stable for larger capacitive load applications. ( Maximum expected V IN ) - V DD R IN -----------------------------------------------------------------------------2 mA V SS - ( Minimum expected V IN ) R IN --------------------------------------------------------------------------2 mA 3.1 Rail-to-Rail Input The MCP6001/2/4 op amp is designed to prevent phase reversal when the input pins exceed the supply voltages. Figure 3-1 shows the input voltage exceeding the supply voltage without any phase reversal. 6 FIGURE 3-2: Resistor (RIN). Input Current Limiting 3.2 VIN VOUT Rail-to-Rail Output Input, Output Voltages (V) 5 4 3 2 1 0 -1 0.E+00 1.E-05 2.E-05 VDD = 5.0V G = +2 V/V The output voltage range of the MCP6001/2/4 op amp is VDD - 25 mV (min.) and VSS + 25 mV (max.) when RL = 10 k is connected to VDD/2 and VDD = 5.5V. Refer to Figure 2-14 for more information. 3.3 Capacitive Loads 3.E-05 4.E-05 5.E-05 6.E-05 7.E-05 8.E-05 9.E-05 1.E-04 Time (10 s/div) FIGURE 3-1: The MCP6001/2/4 Shows No Phase Reversal. The input stage of the MCP6001/2/4 op amp uses two differential input stages in parallel; one operates at low common mode input voltage (VCM) and the other at high VCM. With this topology, the device operates with VCM up to 300 mV above VDD and 300 mV below VSS. The Input Offset Voltage is measured at VCM = VSS - 300 mV and V DD + 300 mV to ensure proper operation. Input voltages that exceed the input voltage range (VSS - 0.3V to VDD + 0.3V at 25C) can cause excessive current to flow into or out of the input pins. Current beyond 2 mA can cause reliability problems. Applications that exceed this rating must be externally limited with a resistor, as shown in Figure 3-2. Driving large capacitive loads can cause stability problems for voltage feedback op amps. As the load capacitance increases, the feedback loop's phase margin decreases, and the closed loop bandwidth is reduced. This produces gain peaking in the frequency response, with overshoot and ringing in the step response. A unity gain buffer (G = +1) is the most sensitive to capacitive loads, but all gains show the same general behavior. When driving large capacitive loads with these op amps (e.g., > 100 pF when G = +1), a small series resistor at the output (RISO in Figure 3-3) improves the feedback loop's phase margin (stability) by making the output load resistive at higher frequencies. It does not, however, improve the bandwidth. - VIN MCP600X + RISO VOUT CL FIGURE 3-3: Output resistor, RISO stabilizes large capacitive loads. To select RISO, check the frequency response peaking (or step response overshoot) on the bench (or with the MCP6001/2/4 Spice macro model). If the response is reasonable, you do not need R ISO. Otherwise, start RISO at 1 k and modify its value until the response is reasonable. 2003 Microchip Technology Inc. DS21733D-page 7 MCP6001/2/4 3.4 Supply Bypass 3.6 3.6.1 Application Circuits UNITY GAIN BUFFER With this family of operation amplifiers, the power supply pin (VDD for single supply) should have a local bypass capacitor (i.e., 0.01 F to 0.1 F) within 2 mm for good high frequency performance. It also needs a bulk capacitor (i.e., 1 F or larger) within 100 mm to provide large, slow currents. This bulk capacitor can be shared with other parts. The rail-to-rail input and output capability of the MCP6001/2/4 op amp is ideal for unity-gain buffer applications. The low quiescent current and wide bandwidth makes the device suitable for a buffer configuration in an instrumentation amplifier circuit, as shown in Figure 3-5. 3.5 PCB Surface Leakage VIN1 MCP6002 + 1/2 MCP6001 + VIN2 MCP6002 + 1/2 R1 VREF R2 VOUT R2 R1 In applications where low input bias current is critical, PCB (printed circuit board) surface leakage effects need to be considered. Surface leakage is caused by humidity, dust or other contamination on the board. Under low humidity conditions, a typical resistance between nearby traces is 1012. A 5V difference would cause 5 pA, if current-to-flow; this is greater than the MCP6001/2/4 family's bias current at 25C (1 pA, typ). The easiest way to reduce surface leakage is to use a guard ring around sensitive pins (or traces). The guard ring is biased at the same voltage as the sensitive pin. An example of this type of layout is shown in Figure 3-4. VINVIN+ VSS R1 = 20 k R2 = 10 k R1 V OUT = ( V IN2 - V IN1 ) * ----- + V REF R2 FIGURE 3-5: Instrumentation Amplifier with Unity Gain Buffer Inputs. 3.6.2 ACTIVE LOW-PASS FILTER Guard Ring FIGURE 3-4: for Inverting Gain. 1. Example Guard Ring Layout 2. Non-inverting Gain and Unity Gain Buffer: a. Connect the non-inverting pin (VIN+) to the input with a wire that does not touch the pcb surface. b. Connect the guard ring to the inverting input pin (VIN-). This biases the guard ring to the common mode input voltage. Inverting and Transimpedance Gain Amplifiers (convert current to voltage, such as photo detectors): a. Connect the guard ring to the non-inverting input pin (VIN+). This biases the guard ring to the same reference voltage as the op amp (e.g., VDD/2 or ground). b. Connect the inverting pin (VIN-) to the input with a wire that does not touch the PCB surface. The MCP6001/2/4 op amp's low input bias current makes it possible for the designer to use larger resistors and smaller capacitors for active low-pass filter applications. However, as the resistance increases, the noise generated also increases. Parasitic capacitances and the large value resistors could also modify the frequency response. These trade-offs need to be considered when selecting circuit elements. It is possible to have a filter cutoff frequency as high as 1/10th of the op amp bandwidth (100 kHz). Figure 3-6 shows a second-order butterworth filter with 100 kHz cutoff frequency and a gain of +1V/V. The component values were Microchip's FilterLab(R) software. 100 pF selected using VIN 14.3 k 53.6 k + MCP6002 VOUT 33 pF FIGURE 3-6: Pass Filter. DS21733D-page 8 Active Second-Order Low- 2003 Microchip Technology Inc. MCP6001/2/4 3.6.3 PEAK DETECTOR The MCP6001/2/4 op amp has a high input impedance, rail-to-rail input and output and low input bias current, which makes this device suitable for a peak detector applications. Figure 3-7 shows a peak detector circuit with clear and sample switches. The peak-detection cycle uses a clock (CLK), as shown in Figure 3-7. At the rising edge of CLK, Sample Switch closes to begin sampling. The peak voltage stored on C1 is sampled to C2 for a sample time defined by tSAMP. At the end of the sample time (falling edge of Sample Signal), Clear Signal goes high and closes the Clear Switch. When the Clear Switch closes, C1 discharges through R1 for a time defined by tCLEAR. At the end of the clear time (falling edge of Clear Signal), op amp A begins to store the peak value of VIN on C1 for a time defined by tDETECT. In order to define the tSAMP and tCLEAR, it is necessary to determine the capacitor charging and discharging period. The capacitor charging time is limited by the amplifier source current, while the discharging time () is defined using R1 ( = R1*C1). tDETECT is the time that the input signal is sampled on C 1, and is dependent on the input voltage change frequency. The op amp output current limit, and the size of the storage capacitors (both C1 and C2), could create slewing limitations as the input voltage (VIN) increases. Current through a capacitor is dependent on the size of the capacitor and the rate of voltage change. From this relationship, the rate of voltage change or the slew rate VIN + MCP6002 1/2 - A D1 RISO VC1 C1 R1 + MCP6002 - 1/2 B RISO VC2 C2 + MCP6001 - C can be determined. For example, with op amp short-circuit current of ISC = 25 mA and load capacitor of C1 = 0.1 F, then: EQUATION dV C1 I SC = C 1 x -----------dt dV C1 I SC ------------ = ------dt C1 25mA = -------------0.1F dV C1 ------------ = 250mV ---------------dt s This voltage change rate is less than the MCP6001/2/4 slew rate of 600 mV/s. When the input voltage swings below the voltage across C1, D1 becomes reversebiased, which opens the feedback loop and rails the amplifier. When the input voltage increases, the amplifier recovers at its slew rate. Based on the rate of voltage change shown in the above equation, it takes an extended period of time to charge a 0.1 F capacitor. The capacitors need to be selected so that the circuit is not limited by the amplifier slew rate. Therefore, the capacitors should be less than 40 F and a stabilizing resistor (RISO) needs to be properly selected. Refer to Section 3.3, "Capacitive Load and Stability", for op amp stability. VOUT Sample Switch Clear Switch tSAMP Sample Signal tCLEAR Clear Signal tDETECT CLK FIGURE 3-7: Peak Detector with Clear and Sample CMOS Analog Switches. 2003 Microchip Technology Inc. DS21733D-page 9 MCP6001/2/4 4.0 DESIGN TOOLS Microchip provides the basic design tools needed for the MCP6001/2/4 family of op amps. 4.1 SPICE Macro Model The latest Spice macro model for the MCP6001/2/4 operational amplifiers (op amps) is available on our website at www.microchip.com. This model is intended as an initial design tool that works well in the op amp's linear region of operation at room temperature. See the model file for information on its capabilities. Bench testing is a very important part of any design and cannot be replaced with simulations. Also, simulation results using this macro model need to be validated by comparing them to the data sheet specifications and characteristic curves. 4.2 FilterLab(R) Software FilterLab is an innovative software tool that simplifies analog active filter (using op amps) design. Available at no cost from our website at www.microchip.com, the FilterLab software active filter software design tool provides full schematic diagrams of the filter circuit with component values. It also outputs the filter circuit in SPICE format, which can be used with the macro model to simulate actual filter performance. DS21733D-page 10 2003 Microchip Technology Inc. MCP6001/2/4 5.0 5.1 PACKAGING INFORMATION Package Marking Information 5-Lead SC-70 (MCP6001) Example: XNN YWW A57 307 5-Lead SOT-23 (MCP6001) 5 4 Example:(MCP6001 I-Temp Pinout) Industrial Extended Temp Code Temp Code AANN ADNN AFNN CDNN CENN CFNN 1 2 3 5 4 Device MCP6001 MCP6001R XXNN 1 2 3 AA07 MCP6001U Note: 8-Lead PDIP (300 mil) XXXXXXXX XXXXXNNN YYWW Applies to 5-Lead SOT-23. Example: MCP6002 I/P057 0307 8-Lead SOIC (150 mil) Example: MCP6002 I/SN0307 057 XXXXXXXX XXXXYYWW NNN 8-Lead MSOP XXXXXX YWWNNN Example: 6002 307057 Legend: XX...X YY WW NNN Customer specific information* Year code (last 2 digits of calendar year) Week code (week of January 1 is week `01') Alphanumeric traceability code Note: In the event the full Microchip part number cannot be marked on one line, it will be carried over to the next line thus limiting the number of available characters for customer specific information. * Standard marking consists of Microchip part number, year code, week code, traceability code (facility code, mask rev#, and assembly code). For marking beyond this, certain price adders apply. Please check with your Microchip Sales Office. 2003 Microchip Technology Inc. DS21733D-page 11 MCP6001/2/4 Package Marking Information (Continued) 14-Lead PDIP (300 mil) (MCP6004) Example: XXXXXXXXXXXXXX XXXXXXXXXXXXXX YYWWNNN MCP6004-I/P 0307057 14-Lead SOIC (150 mil) (MCP6004) Example: XXXXXXXXXX XXXXXXXXXX YYWWNNN MCP6004ISL 0307057 14-Lead TSSOP (MCP6004) Example: XXXXXX YYWW NNN 6004ST 0307 057 DS21733D-page 12 2003 Microchip Technology Inc. MCP6001/2/4 5-Lead Plastic Package (SC-70) E E1 D p B n 1 Q1 c A1 L Units Dimension Limits n p A A2 A1 E E1 D L Q1 c B INCHES NOM 5 .026 (BSC) MILLIMETERS* NOM 5 0.65 (BSC) 0.80 0.80 0.00 1.80 1.15 1.80 0.10 0.10 0.10 0.15 A2 A MIN MAX MIN MAX Number of Pins Pitch Overall Height Molded Package Thickness Standoff Overall Width Molded Package Width Overall Length Foot Length Top of Molded Pkg to Lead Shoulder Lead Thickness Lead Width .031 .031 .000 .071 .045 .071 .004 .004 .004 .006 .043 .039 .004 .094 .053 .087 .012 .016 .007 .012 1.10 1.00 0.10 2.40 1.35 2.20 0.30 0.40 0.18 0.30 *Controlling Parameter Notes: Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed .005" (0.127mm) per side. JEITA (EIAJ) Standard: SC-70 Drawing No. C04-061 2003 Microchip Technology Inc. DS21733D-page 13 MCP6001/2/4 5-Lead Plastic Small Outline Transistor (OT) (SOT23) E E1 p B p1 D n 1 c A A2 L A1 Units Dimension Limits n Number of Pins p Pitch p1 Outside lead pitch (basic) Overall Height Molded Package Thickness Standoff Overall Width Molded Package Width Overall Length Foot Length Foot Angle Lead Thickness Lead Width Mold Draft Angle Top Mold Draft Angle Bottom * Controlling Parameter Significant Characteristic A A2 A1 E E1 D L c B MIN INCHES* NOM 5 .038 .075 .046 .043 .003 .110 .064 .116 .018 5 .006 .017 5 5 MAX MIN .035 .035 .000 .102 .059 .110 .014 0 .004 .014 0 0 .057 .051 .006 .118 .069 .122 .022 10 .008 .020 10 10 MILLIMETERS NOM 5 0.95 1.90 0.90 1.18 0.90 1.10 0.00 0.08 2.60 2.80 1.50 1.63 2.80 2.95 0.35 0.45 0 5 0.09 0.15 0.35 0.43 0 5 0 5 MAX 1.45 1.30 0.15 3.00 1.75 3.10 0.55 10 0.20 0.50 10 10 Notes: Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed .010" (0.254mm) per side. JEDEC Equivalent: MO-178 Drawing No. C04-091 DS21733D-page 14 2003 Microchip Technology Inc. MCP6001/2/4 8-Lead Plastic Dual In-line (P) - 300 mil (PDIP) E1 D 2 n 1 E A A2 c L A1 eB B1 p B Number of Pins Pitch Top to Seating Plane Molded Package Thickness Base to Seating Plane Shoulder to Shoulder Width Molded Package Width Overall Length Tip to Seating Plane Lead Thickness Upper Lead Width Lower Lead Width Overall Row Spacing Mold Draft Angle Top Mold Draft Angle Bottom * Controlling Parameter Significant Characteristic Units Dimension Limits n p A A2 A1 E E1 D L c B1 B eB MIN INCHES* NOM 8 .100 .155 .130 .313 .250 .373 .130 .012 .058 .018 .370 10 10 MAX MIN .140 .115 .015 .300 .240 .360 .125 .008 .045 .014 .310 5 5 .170 .145 .325 .260 .385 .135 .015 .070 .022 .430 15 15 MILLIMETERS NOM 8 2.54 3.56 3.94 2.92 3.30 0.38 7.62 7.94 6.10 6.35 9.14 9.46 3.18 3.30 0.20 0.29 1.14 1.46 0.36 0.46 7.87 9.40 5 10 5 10 MAX 4.32 3.68 8.26 6.60 9.78 3.43 0.38 1.78 0.56 10.92 15 15 Notes: Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed .010" (0.254mm) per side. JEDEC Equivalent: MS-001 Drawing No. C04-018 2003 Microchip Technology Inc. DS21733D-page 15 MCP6001/2/4 8-Lead Plastic Small Outline (SN) - Narrow, 150 mil (SOIC) E E1 p D 2 B n 1 h 45 c A A2 L A1 Number of Pins Pitch Overall Height Molded Package Thickness Standoff Overall Width Molded Package Width Overall Length Chamfer Distance Foot Length Foot Angle Lead Thickness Lead Width Mold Draft Angle Top Mold Draft Angle Bottom * Controlling Parameter Significant Characteristic Units Dimension Limits n p A A2 A1 E E1 D h L c B MIN .053 .052 .004 .228 .146 .189 .010 .019 0 .008 .013 0 0 INCHES* NOM 8 .050 .061 .056 .007 .237 .154 .193 .015 .025 4 .009 .017 12 12 MAX MIN .069 .061 .010 .244 .157 .197 .020 .030 8 .010 .020 15 15 MILLIMETERS NOM 8 1.27 1.35 1.55 1.32 1.42 0.10 0.18 5.79 6.02 3.71 3.91 4.80 4.90 0.25 0.38 0.48 0.62 0 4 0.20 0.23 0.33 0.42 0 12 0 12 MAX 1.75 1.55 0.25 6.20 3.99 5.00 0.51 0.76 8 0.25 0.51 15 15 Notes: Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed .010" (0.254mm) per side. JEDEC Equivalent: MS-012 Drawing No. C04-057 DS21733D-page 16 2003 Microchip Technology Inc. MCP6001/2/4 8-Lead Plastic Micro Small Outline Package (MS) (MSOP) E E1 p D 2 B n 1 A c A1 (F) A2 L 8 Number of Pins .026 BSC Pitch A .043 Overall Height A2 .030 .033 .037 Molded Package Thickness A1 .006 .000 Standoff E .193 TYP. Overall Width E1 .118 BSC Molded Package Width D .118 BSC Overall Length L .016 .024 .031 Foot Length Footprint (Reference) F .037 REF Foot Angle 0 8 c Lead Thickness .003 .006 .009 B .009 .012 .016 Lead Width 5 15 Mold Draft Angle Top 5 15 Mold Draft Angle Bottom *Controlling Parameter Notes: Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed .010" (0.254mm) per side. Units Dimension Limits n p MIN INCHES NOM MAX MIN MILLIMETERS* NOM 8 0.65 BSC 0.75 0.85 0.00 4.90 BSC 3.00 BSC 3.00 BSC 0.40 0.60 0.95 REF 0 0.08 0.22 5 5 - MAX 1.10 0.95 0.15 0.80 8 0.23 0.40 15 15 JEDEC Equivalent: MO-187 Drawing No. C04-111 2003 Microchip Technology Inc. DS21733D-page 17 MCP6001/2/4 14-Lead Plastic Dual In-line (P) - 300 mil (PDIP) E1 D 2 n 1 E A A2 c A1 eB B1 B p L Number of Pins Pitch Top to Seating Plane A .140 .170 Molded Package Thickness A2 .115 .145 Base to Seating Plane A1 .015 Shoulder to Shoulder Width E .300 .313 .325 Molded Package Width E1 .240 .250 .260 Overall Length D .740 .750 .760 Tip to Seating Plane L .125 .130 .135 c Lead Thickness .008 .012 .015 Upper Lead Width B1 .045 .058 .070 Lower Lead Width B .014 .018 .022 Overall Row Spacing eB .310 .370 .430 Mold Draft Angle Top 5 10 15 Mold Draft Angle Bottom 5 10 15 * Controlling Parameter Significant Characteristic Notes: Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed .010" (0.254mm) per side. JEDEC Equivalent: MS-001 Drawing No. C04-005 Units Dimension Limits n p MIN INCHES* NOM 14 .100 .155 .130 MAX MIN MILLIMETERS NOM 14 2.54 3.56 3.94 2.92 3.30 0.38 7.62 7.94 6.10 6.35 18.80 19.05 3.18 3.30 0.20 0.29 1.14 1.46 0.36 0.46 7.87 9.40 5 10 5 10 MAX 4.32 3.68 8.26 6.60 19.30 3.43 0.38 1.78 0.56 10.92 15 15 DS21733D-page 18 2003 Microchip Technology Inc. MCP6001/2/4 14-Lead Plastic Small Outline (SL) - Narrow, 150 mil (SOIC) E E1 p D 2 B n 1 h 45 c A A2 L Units Dimension Limits n p A A2 A1 E E1 D h L c B INCHES* NOM 14 .050 .061 .056 .007 .236 .154 .342 .015 .033 4 .009 .017 12 12 MILLIMETERS NOM 14 1.27 1.35 1.55 1.32 1.42 0.10 0.18 5.79 5.99 3.81 3.90 8.56 8.69 0.25 0.38 0.41 0.84 0 4 0.20 0.23 0.36 0.42 0 12 0 12 A1 MIN MAX MIN MAX Number of Pins Pitch Overall Height Molded Package Thickness Standoff Overall Width Molded Package Width Overall Length Chamfer Distance Foot Length Foot Angle Lead Thickness Lead Width Mold Draft Angle Top Mold Draft Angle Bottom * Controlling Parameter Significant Characteristic .053 .052 .004 .228 .150 .337 .010 .016 0 .008 .014 0 0 .069 .061 .010 .244 .157 .347 .020 .050 8 .010 .020 15 15 1.75 1.55 0.25 6.20 3.99 8.81 0.51 1.27 8 0.25 0.51 15 15 Notes: Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed .010" (0.254mm) per side. JEDEC Equivalent: MS-012 Drawing No. C04-065 2003 Microchip Technology Inc. DS21733D-page 19 MCP6001/2/4 14-Lead Plastic Thin Shrink Small Outline (ST) - 4.4 mm (TSSOP) E E1 p D 2 n B 1 A c L A1 A2 Number of Pins Pitch Overall Height Molded Package Thickness Standoff Overall Width Molded Package Width Molded Package Length Foot Length Foot Angle Lead Thickness Lead Width Mold Draft Angle Top Mold Draft Angle Bottom * Controlling Parameter Significant Characteristic Units Dimension Limits n p A A2 A1 E E1 D L c B1 MIN INCHES NOM 14 .026 .035 .004 .251 .173 .197 .024 4 .006 .010 5 5 MAX MIN .033 .002 .246 .169 .193 .020 0 .004 .007 0 0 .043 .037 .006 .256 .177 .201 .028 8 .008 .012 10 10 MILLIMETERS* NOM MAX 14 0.65 1.10 0.85 0.90 0.95 0.05 0.10 0.15 6.25 6.38 6.50 4.30 4.40 4.50 4.90 5.00 5.10 0.50 0.60 0.70 0 4 8 0.09 0.15 0.20 0.19 0.25 0.30 0 5 10 0 5 10 Notes: Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed .005" (0.127mm) per side. JEDEC Equivalent: MO-153 Drawing No. C04-087 DS21733D-page 20 2003 Microchip Technology Inc. MCP6001/2/4 PRODUCT IDENTIFICATION SYSTEM To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office. PART NO. Device X Temperature Range MCP6001T: MCP6001RT: MCP6001UT: MCP6002: MCP6002T: MCP6004: MCP6004T: /XX Package Examples: a) b) MCP6001T-I/LT: Tape and Reel, Industrial Temperature, 5LD SC-70 package MCP6001T-I/OT: Tape and Reel, Industrial Temperature, 5LD SOT-23 package. MCP6001RT-I/OT: Tape and Reel, Industrial Temperature, 5LD SOT-23 package. MCP6001UT-E/OT:Tape and Reel, Extended Temperature, 5LD SOT-23 package. MCP6001UT-I/OT: Tape and Reel, Industrial Temperature, 5LD SOT-23 package. MCP6002-I/MS: Industrial Temperature, 8LD MSOP package. MCP6002-I/P: Industrial Temperature, 8LD PDIP package. MCP6002-E/P: Extended Temperature, 8LD PDIP package. MCP6002-I/SN: Industrial Temperature, 8LD SOIC package. MCP6002T-I/MS: Tape and Reel, Industrial Temperature, 8LD MSOP package. MCP6002T-I/SN: Tape and Reel, Industrial Temperature, 8LD SOIC package. MCP6004-I/P: Industrial Temperature, 14LD PDIP package. MCP6004-I/SL: Industrial Temperature,, 14LD SOIC package. MCP6004-E/SL: Extended Temperature,, 14LD SOIC package. MCP6004-I/ST: Industrial Temperature, 14LD TSSOP package. MCP6004T-I/SL: Tape and Reel, Industrial Temperature, 14LD SOIC package. MCP6004T-I/ST: Tape and Reel, Industrial Temperature, 14LD TSSOP package. Device: 1 MHz Bandwidth, Low Power Op Amp (Tape and Reel) (SC-70, SOT-23) 1 MHz Bandwidth, Low Power Op Amp (Tape and Reel) (SOT-23) 1 MHz Bandwidth, Low Power Op Amp (Tape and Reel) (SOT-23) 1 MHz Bandwidth, Low Power Op Amp 1 MHz Bandwidth, Low Power Op Amp (Tape and Reel) (SOIC, MSOP) 1 MHz Bandwidth, Low Power Op Amp 1 MHz ,Bandwidth Low Power Op Amp (Tape and Reel) (SOIC, MSOP) c) d) e) a) b) c) Temperature Range: I E = -40C to +85C = -40C to +125C d) e) f) a) b) c) d) e) f) Package: LT = Plastic Package (SC-70), 5-lead (MCP6001 only) OT = Plastic Small Outline Transistor (SOT-23), 5-lead (MCP6001, MCP6001R, MCP6001U) MS = Plastic MSOP, 8-lead P = Plastic DIP (300 mil Body), 8-lead, 14-lead SN = Plastic SOIC, (150 mil Body), 8-lead SL = Plastic SOIC (150 mil Body), 14-lead ST = Plastic TSSOP (4.4mm Body), 14-lead Sales and Support Data Sheets Products supported by a preliminary Data Sheet may have an errata sheet describing minor operational differences and recommended workarounds. To determine if an errata sheet exists for a particular device, please contact one of the following: 1. 2. 3. Your local Microchip sales office The Microchip Corporate Literature Center U.S. FAX: (480) 792-7277 The Microchip Worldwide Site (www.microchip.com) Please specify which device, revision of silicon and Data Sheet (include Literature #) you are using. Customer Notification System Register on our web site (www.microchip.com/cn) to receive the most current information on our products. 2003 Microchip Technology Inc. DS21733D-page 21 MCP6001/2/4 NOTES: DS21733D-page 22 2003 Microchip Technology Inc. Note the following details of the code protection feature on Microchip devices: * * * Microchip products meet the specification contained in their particular Microchip Data Sheet. Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the intended manner and under normal conditions. There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip's Data Sheets. Most likely, the person doing so is engaged in theft of intellectual property. Microchip is willing to work with the customer who is concerned about the integrity of their code. Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not mean that we are guaranteeing the product as "unbreakable." * * Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our products. Attempts to break microchip's code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act. Information contained in this publication regarding device applications and the like is intended through suggestion only and may be superseded by updates. It is your responsibility to ensure that your application meets with your specifications. No representation or warranty is given and no liability is assumed by Microchip Technology Incorporated with respect to the accuracy or use of such information, or infringement of patents or other intellectual property rights arising from such use or otherwise. Use of Microchip's products as critical components in life support systems is not authorized except with express written approval by Microchip. No licenses are conveyed, implicitly or otherwise, under any intellectual property rights. Trademarks The Microchip name and logo, the Microchip logo, KEELOQ, MPLAB, PIC, PICmicro, PICSTART, PRO MATE and PowerSmart are registered trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. FilterLab, microID, MXDEV, MXLAB, PICMASTER, SEEVAL and The Embedded Control Solutions Company are registered trademarks of Microchip Technology Incorporated in the U.S.A. Accuron, Application Maestro, dsPIC, dsPICDEM, dsPICDEM.net, ECONOMONITOR, FanSense, FlexROM, fuzzyLAB, In-Circuit Serial Programming, ICSP, ICEPIC, microPort, Migratable Memory, MPASM, MPLIB, MPLINK, MPSIM, PICC, PICkit, PICDEM, PICDEM.net, PowerCal, PowerInfo, PowerMate, PowerTool, rfLAB, rfPIC, Select Mode, SmartSensor, SmartShunt, SmartTel and Total Endurance are trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. Serialized Quick Turn Programming (SQTP) is a service mark of Microchip Technology Incorporated in the U.S.A. All other trademarks mentioned herein are property of their respective companies. (c) 2003, Microchip Technology Incorporated, Printed in the U.S.A., All Rights Reserved. Printed on recycled paper. Microchip received QS-9000 quality system certification for its worldwide headquarters, design and wafer fabrication facilities in Chandler and Tempe, Arizona in July 1999 and Mountain View, California in March 2002. The Company's quality system processes and procedures are QS-9000 compliant for its PICmicro(R) 8-bit MCUs, KEELOQ(R) code hopping devices, Serial EEPROMs, microperipherals, non-volatile memory and analog products. In addition, Microchip's quality system for the design and manufacture of development systems is ISO 9001 certified. 2003 Microchip Technology Inc. DS21733D-page 23 M WORLDWIDE SALES AND SERVICE AMERICAS Corporate Office 2355 West Chandler Blvd. Chandler, AZ 85224-6199 Tel: 480-792-7200 Fax: 480-792-7277 Technical Support: 480-792-7627 Web Address: http://www.microchip.com ASIA/PACIFIC Australia Microchip Technology Australia Pty Ltd Marketing Support Division Suite 22, 41 Rawson Street Epping 2121, NSW Australia Tel: 61-2-9868-6733 Fax: 61-2-9868-6755 Japan Microchip Technology Japan K.K. Benex S-1 6F 3-18-20, Shinyokohama Kohoku-Ku, Yokohama-shi Kanagawa, 222-0033, Japan Tel: 81-45-471- 6166 Fax: 81-45-471-6122 Atlanta 3780 Mansell Road, Suite 130 Alpharetta, GA 30022 Tel: 770-640-0034 Fax: 770-640-0307 Korea Microchip Technology Korea 168-1, Youngbo Bldg. 3 Floor Samsung-Dong, Kangnam-Ku Seoul, Korea 135-882 Tel: 82-2-554-7200 Fax: 82-2-558-5934 China - Beijing Microchip Technology Consulting (Shanghai) Co., Ltd., Beijing Liaison Office Unit 915 Bei Hai Wan Tai Bldg. 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B505A, Fullhope Plaza, No. 12 Hong Kong Central Rd. Qingdao 266071, China Tel: 86-532-5027355 Fax: 86-532-5027205 Italy Microchip Technology SRL Via Quasimodo, 12 20025 Legnano (MI) Milan, Italy Tel: 39-0331-742611 Fax: 39-0331-466781 India Microchip Technology Inc. India Liaison Office Marketing Support Division Divyasree Chambers 1 Floor, Wing A (A3/A4) No. 11, O'Shaugnessey Road Bangalore, 560 025, India Tel: 91-80-2290061 Fax: 91-80-2290062 United Kingdom Microchip Ltd. 505 Eskdale Road Winnersh Triangle Wokingham Berkshire, England RG41 5TU Tel: 44-118-921-5869 Fax: 44-118-921-5820 05/30/03 DS21733D-page 24 2003 Microchip Technology Inc. |
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